1. Field of the Invention
The present invention relates to the manufacture of semiconductor devices. More specifically, the present invention relates to plasma processing systems that employ RF power to process semiconductor wafers.
2. Description of the Related Art
Semiconductor processing systems are used to process semiconductor wafers for fabrication of integrated circuits. In particular, plasma-based semiconductor processes are commonly used in etching, oxidation, chemical vapor deposition (CVD), etc. The plasma-based semiconductor processes are typically carried out by means of plasma processing systems that include parallel plate reactors in a plasma processing chamber to provide a controlled setting. In such plasma processing systems, the parallel plate reactors typically employ two different RF frequencies for generating sufficient plasma density for anisotropic etching and ion bombardment energy for isotropic etching.
FIG. 1 illustrates a conventional plasma processing system 100 that uses two different RF frequencies for processing a semiconductor wafer 102. The plasma processing system 100 includes a plasma processing chamber 104, a pair of match networks 106 and 108, and a pair of RF generators 110 and 112. The plasma processing chamber 104 includes an electrostatic chuck 114 and a shower head 120. The shower head 120 includes an upper electrode 122 and is adapted to release a source gas into the chamber 104 for generating plasma over the wafer 102. The electrostatic chuck 114 includes a lower electrode 124 and functions to hold the wafer 102 in place for processing. A gas 126 such as helium is provided through a port 128 to control the temperature of the wafer 102. The plasma processing system 100 may also include an electrostatic chuck power supply (not shown) for supplying power to the chuck 114. Electrostatic chucks are well known in the art and are amply described, for example, in commonly owned U.S. Pat. No. 5,789,904 by Francois Guyot and entitled xe2x80x9cHigh Power Electrostatic Chuck Contact,xe2x80x9d U.S. patent application Ser. No. 08/624,988 by Jones et al. and entitled xe2x80x9cDynamic Feedback Electrostatic Wafer Chuck,xe2x80x9d U.S. patent application Ser. No. 08/550,510 by Castro et al., and U.S. Pat. No. 5,793,192 by Kubly et al. and entitled xe2x80x9cMethods and Apparatus for Clamping and Declamping a Semiconductor Wafer in a Wafer Processing System.xe2x80x9d The disclosures of these references are incorporated herein by reference.
The RF generators 110 and 112 are typically arranged to generate a high frequency RF power and a low frequency RF power, respectively, for delivery to the lower electrode 124 in the electrostatic chuck 114. The high frequency RF power from the RF generator 110 is mostly used to generate plasma (i.e., plasma density) in the space between the shower head 122 and the wafer 102. On the other hand, the low frequency RF power from the RF generator 112 predominantly controls the generation of ion bombardment energy for anisotropic or directional etching of the wafer 102. However, these two frequencies do not act independently on the plasma; instead, each frequency generates plasma and contributes to the ion bombardment energy as well.
The RF matching networks 106 and 108 are coupled to deliver RF power from the RF generators 110 and 112, respectively, to the electrostatic chuck 114. Generally, the match networks 106 and 108 are coupled to the RF generators 110 and 112, respectively, by means of co-axial cables 116 and 118, respectively. The RF matching networks 106 and 108 are provided between the RF generators 110 and 112, respectively, and the plasma processing chamber 104 to minimize reflection of RF power from the plasma processing chamber 104. The RF matching network 110 typically includes one or more variable impedance elements (e.g., capacitors, inductors). The variable impedance elements in the RF matching networks 106 and 108 may be tuned to provide impedance that matches the impedance of the RF generators 110 and 112, respectively. RF match network circuits are well known in the art and are described, for example, in U.S. patent application Ser. No. 5,187,454 by Collins et al. and U.S. patent application Ser. No. 09/218,542 by Arthur M. Howald and filed on Dec. 22 1998. The disclosures of these references are incorporated herein by reference.
The use of both high and low frequency RF power from the RF generators 110 and 112 is designed to ensure adequate supply of plasma and ion bombardment energy. Specifically, when the RF generators 110 and 112 are energized after a source gas 130 has been introduced into the chamber 104, the high and low frequency powers from the RF generators 110 and 112 facilitate generation of plasma 132 and ion bombardment energy for processing the wafer 102. The high frequency RF power, typically in the range between 4 MHz to 60 MHz, from the RF generator 110 largely facilitates generation of plasma 132 from the source gas. On the other hand, the low frequency RF power from the RF generator 112, typically in the range between 100 KHz and 4 MHz, largely facilitates ion bombardment against the wafer 102 by increasing the ion bombardment energy.
When RF powers are applied, bias voltages often called xe2x80x9csheath voltagesxe2x80x9d are generated near the electrodes 122 and 124. FIG. 2A shows a schematic diagram of plasma sheaths 202 and 204 generated near the surface of the electrodes 122 and 124, respectively. In this configuration, the sheath voltages which drop across the sheaths 202 and 204 correspond to the floating potential of the plasma and are about four to five times the plasma electron temperature in the absence of RF power. When the low and high frequency RF powers are applied, the RF current i flows from the lower electrode 124 to the upper electrode 122. The sheath voltages rise close to the peak RF potential. As a result, the sheaths expand and the average voltage drops between the plasma and electrodes 122 and 124 increase. The increase in the voltage drops, in turn, causes increase in ion bombardment energy toward the electrodes 122 and 124.
Unfortunately, however, one of the drawbacks in using the two-frequency approach of the plasma processing system 100 is the non-uniformity in wafer etch rate associated with the low frequency RF power. In general, the use of high frequency RF power alone generates substantially uniform etch rates across the surface of a wafer. In such cases, however, the etch rate tends to be too low and the pattern profile is poorly controlled due to insufficient ion bombardment energy. The use of low frequency RF power increases the ion bombardment energy.
However, the use of low frequency RF power along with the high frequency RF power in a plasma process system tends to result in non-uniform etching over the surface of the wafer. For example, FIG. 2B illustrates a graph 200 of an etch rate as a function of distance from the center of a wafer. As shown, the etch rate of the wafer decreases as the distance from the center of the wafer increases. Thus, the etch rate near the edge of the wafer may not match the design specification, thereby resulting in a lower die yield.
In view of the foregoing, what is needed is a system and method for processing a wafer surface without using a separate low frequency RF power generator in a plasma processing system to enhance the uniformity of wafer processing results without reducing the etch rate on the wafer.
Broadly speaking, the present invention fills these needs by providing a system, apparatus, and method for processing a wafer using a single frequency RF power in a plasma processing chamber. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, a method, or a computer readable medium. Several inventive embodiments of the present invention are described below.
In accordance with one embodiment, the present invention provides a plasma processing system for processing a wafer using a single frequency RF power. The plasma processing system includes a modulated RF power generator, a plasma processing chamber, and a match network. The modulated RF power generator is arranged to generate a modulated RF power (e.g., energy). The plasma processing chamber is arranged to receive the modulated RF power for processing the wafer and is characterized by an internal impedance during the plasma processing. The plasma processing chamber includes an electrostatic chuck for holding the wafer in place with the electrostatic chuck including a first electrode disposed under the wafer for receiving the modulated RF power. The plasma processing chamber further includes a second electrode disposed over the wafer. The modulated RF power generates plasma and ion bombardment energy for processing the wafer. The match network is coupled between the modulated RF power generator and the plasma processing chamber to receive and transmit the modulated RF power from the modulated RF power generator to the plasma processing chamber. The match network is further configured to match an impedance of the modulated RF power generator to the internal impedance of the plasma processing chamber.
In another embodiment, the present invention provides a plasma processing apparatus for etching a wafer. The plasma processing apparatus includes a modulated RF power generator, a plasma processing chamber, and a matching network. The modulated RF power generator is configured to generate a modulated high frequency RF power. The plasma processing chamber is arranged to receive the modulated high frequency RF power for etching the wafer. The plasma processing chamber is characterized by an impedance and includes an electrostatic chuck for holding the wafer in place. The electrostatic chuck includes a first electrode disposed under the wafer for receiving the modulated high frequency RF power. The plasma processing chamber further includes a second electrode disposed over the wafer. In response to the modulated high frequency RF power, plasma and ion bombardment energy are generated for etching the wafer. The match network is coupled between the modulated RF power generator and the plasma processing chamber to receive and transmit the modulated high frequency RF power from the modulated RF power generator to the plasma processing chamber. The match network is further configured to match the impedance of the modulated RF power generator to the impedance of the plasma processing chamber.
In yet another embodiment, a method is disclosed for processing a wafer in a plasma processing chamber using single frequency RF power. The method includes: (a) generating a single modulated RF power; (b) providing a wafer over an electrostatic chuck in a plasma processing chamber, the electrostatic chuck including a first electrode disposed under the wafer for receiving the modulated RF power, and the plasma processing chamber further including a second electrode disposed over the wafer; (c) receiving the modulated RF power, by the plasma processing chamber; and (d) generating plasma and ion bombardment energy in the plasma processing chamber for processing the wafer in response to the modulated RF power.
Preferably, the modulated RF power is a high frequency RF power including an average RF power for providing a high anisotropic etch rate, a peak RF power for providing a high ion bombardment energy, and a modulation frequency configured to decouple the etch rate from the ion bombardment energy. Advantageously, the use of the modulated RF power provides a high etch rate in conjunction with a high degree of etch profile control. Thus, the plasma processing system 400 of the present invention allows optimum processing of the wafer for both isotropic and anisotropic etching simultaneously. Further, the modulation of the high frequency RF power effectively decouples the ion flux from the ion bombardment energy, allowing more precise control of etch profiles and overall plasma density. In addition, the use of the modulated high frequency RF power allows extension of the process window of dielectric etch for enhanced plasma processing. For example, the plasma processing system allows oxide layers to be etched at and below 0.18 xcexcm with good profile control. These and other advantages of the present invention will become apparent upon reading the following detailed descriptions and studying the various figures of the drawings.